Wireless communication systems often require precise clocks that may be modulated to carry data. A clock may be generated using a Phase-Locked Loop (PLL) that has a voltage-controlled oscillator (VCO) that converts an input voltage to an output clock with a frequency that depends on the input voltage.
Some communication standards employ many frequencies and may hop from one frequency channel to another to avoid interference or other impediments to transmission. The VCO may thus be required to operate over a wide range of frequencies, and require a large gain. Large VCO gains often require a large chip area and thus a higher cost of manufacture and power.
FIG. 1A is a graph of operation of a multi-curve VCO. One solution to provide a wide frequency range with a low-gain VCO is to use a multi-curve VCO. The VCO can operate using one of many operating curves 20. As the internal capacitance C within the VCO is increased, a lower one of operating curves 20 is selected as selected curve 22. Selected curve 22 has a center frequency FC when a center voltage VC is applied as the input voltage to the VCO. As capacitance C is increased, a lower one of operating curves 20 is selected having a lower center frequency FC.
Since there are many operating curves 20, a wider range of frequencies is available than if only one curve 22 were available. The slope of each of operating curves 20 can be more flat than if a single operating curve had to cover all frequencies. The lower slope is a visual representation of lower VCO gain.
FIG. 1B shows a multi-curve Inductor-Capacitor VCO. An LC oscillator has varactors to continuously control the oscillator frequency of the VCO for curve 20. Inductors 90, 92 and variable capacitors 94, 96 can be binary-weighted or thermometer coded and load cross-coupled n-channel transistors 76, 78, which have their source currents sunk by current sink 74.
Capacitor arrays 70, 72 add capacitance loading to the LC oscillator to generate a multi-curve VCO output. Capacitor arrays 70, 72 can be binary-weighted capacitor arrays with a binary input that selects the capacitance value of the variable capacitor.
FIG. 1C shows a multi-curve ring-oscillator VCO. Inverters 12, 14, 16 are connected in a ring causing OUT to oscillate high and low. Variable capacitor 10 slows the output of inverter 12, increasing the loop delay and reducing the frequency of OUT. Variable capacitor 10 may be a binary-weighted capacitor array with a binary input that selects the capacitance value of variable capacitor 10. Other variable capacitors 10 may be added to the outputs of inverters 14, 16 to slow their outputs.
FIG. 1D shows a multi-curve VCO with a binary-weighted source current. Inverters 17, 18, 19 are connected in a ring causing OUT to oscillate high and low. Variable discrete current is provided by selecting some of binary-weighted current-supply p-channel transistors 82 using switches 84 that drive current to the power supplies of inverters 17, 18, 19. The gate bias to transistors 82 is provided by bias p-channel transistor 62 in series with current sink 60. Variable current source 68 may also adjust current through p-channel transistors 66, 64.
Increasing the discrete current from transistors 82 results in deceasing the output resistance of inverters 17, 18, 19 and increasing the frequency OUT. The variable discrete current source may be binary-weighted with a binary input that selects the current source value using switches 84.
When a multi-curve VCO is employed, some mechanism is needed to select which of operating curves 20 is selected as selected curve 22. When the frequency being used is changed, selected curve 22 also changes to another one of operating curves 20. Since the frequencies used by operating curves 20 are often close to one another, very little separation is available between operating curves 20, and Process, power-supply Voltage, and Temperature (PVT) variations can be much larger than the frequency separations. The center frequency FC of a curve can vary significantly with PVT. Thus the center frequencies FC of all curves may be calibrated first before normal operation. However, there may be many operating curves 20, such as 26 or 64, and calibration of all these curves may require too much time and result in start-up delays that are undesirable.
As the system warms up, PVT may continue to vary, forcing re-calibration and more delays. Operation near the target frequency of the wireless channel may not be possible when the center frequency FC shifts with PVT since operating curves 20 have a shallow slope.
Some systems are closed loop, where the PLL loop filter remains connected to the VCO input during calibration. This is undesirable due to the extra settling time for the loop. Open loop systems disconnect the PLL loop filter from the VCO input during calibration, resulting in faster calibration times.
What is desired is a multi-curve VCO PLL with an open-loop calibration system. A calibration system that does not calibrate all operating curves is desirable to reduce calibration time. A very precise calibration system is desired yet one that can quickly select a group of operating curves for more precise calibration, without requiring calibration of all operating curves. A calibration unit that does not require precision analog comparators is desirable. A low-power and low area calibration unit is desired.